An FPGA-based Linux test-bed was constructed for the purpose of measuring its sensitivity to single-event upsets. The test-bed\r\nconsists of two ML410 Xilinx development boards connected using a 124-pin custom connector board. The Design Under Test\r\n(DUT) consists of the ââ?¬Å?hard coreââ?¬Â PowerPC, running the Linux OS and several peripherals implemented in ââ?¬Å?softââ?¬Â (programmable)\r\nlogic. Faults were injected via the Internal Configuration Access Port (ICAP). The experiments performed here demonstrate that\r\nthe Linux-based system was sensitive to 199,584 or about 1.4 percent of all tested bits. Each sensitive bit in the bit-stream is\r\nmapped to the resource and user-module to which it configures. A density metric for comparing the reliability of modules within\r\nthe system is presented. Using this density metric, we found that the most sensitive user module in the design was the PowerPCââ?¬â?¢s\r\ndirect connections to the DDR2 memory controller.
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